|Port Type||Name||Width (bits)||Description|
Detailed information about the SystemC TLM2 Fast Processor Model of the Xilinx MicroBlaze V7_10 core.
Processor IP owner is Xilinx MicroBlaze. More information is available from them here.
OVP Fast Processor Model is written in C.
Provides a C API for use in C based platforms.
Provides a native C++ interface for use in SystemC TLM2 platforms.
The model is written using the OVP VMI API that provides a Virtual Machine Interface that defines the behavior of the processor.
The VMI API makes a clear line between model and simulator allowing very good optimization and world class high speed performance.
The model has been run through an extensive QA and regression testing process.
Model downloadable (needs registration and to be logged in) in package microblaze.model for Windows32 and for Linux32
Model Variant name: V7_10
Microblaze Processor Model
Apache 2.0 Open Source License
Instruction Set: This model fully implements the instruction set upto and including V8.2.
Privileged Instructions: Implemented
Virtual-Memory Management: Implemented
Reset, Interrupts, Exceptions and Break: Implemented
Floating Point Unit: Implemented
Stream Link Interface: Implemented
No known limitations
Machine Status Set/Clear Instructions.
Pattern Compare Instructions.
Floating Point Unit (FPU).
Disable Hardware Multiplier.
Processor Version Register (PVR).
Hardware Multiplier 64-bit Result.
Floating Point Conversion and Square Root Instructions.
Memory Management Unit.
Extended Stream Instructions .
Models have been validated correct by running through extensive tests using test suites and technology provided by Xilinx
OVP simulator downloadable (needs registration and to be logged in) in package OVPsim for Windows32 and for Linux32
OVP Download page here.
OVP documentation that provides overview information on processor models is available OVP_Guide_To_Using_Processor_Models.pdf.
Full model specific documentation on the variant V7_10 is available OVP_Model_Specific_Information_microblaze_V7_10.pdf.
Location: The Fast Processor Model source and object file is found in the installation VLNV tree: xilinx.ovpworld.org/processor/microblaze/1.0
Processor Endian-ness: This model can be set to either endian-ness (normally by a pin, or the ELF code).
Processor ELF Code: The ELF code for this model is: 0xbd
|VIRTUAL_PRIV||1||Virtual privileged mode|
|VIRTUAL_USER||2||Virtual user mode|
The Xilinx MicroBlaze_V7_10 SystemC TLM2 Fast Processor Model also has parameters, model commands, and many registers.
The model may also have hierarchy or be multicore and have other attributes and capabilities.
To see this information, please have a look at the model variant specific documents.
Click here to see the detailed document OVP_Model_Specific_Information_microblaze_V7_10.pdf.
Information on the Xilinx MicroBlaze_V7_10 OVP Fast Processor Model can also be found on other web sites:
www.systemc-cpu-models.org has the page www.systemc-cpu-models.org/other_models/xilinx_microblaze_v7_10
www.ovpworld.org has the library pages http://www.ovpworld.org/library/wikka.php?wakka=CategoryProcessor
www.systemc-processor-models.org has the page www.systemc-processor-models.org/other_models/xilinx_microblaze_v7_10
www.systemc-tlm-cpu-models.org has the page www.systemc-tlm-cpu-models.org/other_models/xilinx_microblaze_v7_10
www.systemc-tlm-models.org has the page www.systemc-tlm-models.org/other_models/xilinx_microblaze_v7_10
www.systemc-tlm-processor-models.org has the page www.systemc-tlm-processor-models.org/other_models/xilinx_microblaze_v7_10
Currently available Fast Processor Model Families.