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Detailed information about the SystemC TLM2 Fast Processor Model of the ARM ARMv7-M core.
Processor IP owner is ARM Holdings. More information is available from them here.
OVP Fast Processor Model is written in C.
Provides a C API for use in C based platforms.
Provides a native C++ interface for use in SystemC TLM2 platforms.
The model is written using the OVP VMI API that provides a Virtual Machine Interface that defines the behavior of the processor.
The VMI API makes a clear line between model and simulator allowing very good optimization and world class high speed performance.
The model has been run through an extensive QA and regression testing process.
Model downloadable (needs registration and to be logged in) in package armm.model for Windows32 and for Linux32
Model Variant name: ARMv7-M
ARMM Processor Model
Imperas Modified Apache 2.0 Open Source License
Performance Monitors are not implemented.
Models have been extensively tested by Imperas. ARM Cortex-M models have been successfully used by customers to simulate the Micrium uC/OS-II kernel and FreeRTOS.
The model is configured with 0 interrupts and 1 priority bits (use override_numInterrupts and override_priorityBits parameters to change these).
Thumb-2 instructions are supported.
Trivial Jazelle extension is implemented.
OVP simulator downloadable (needs registration and to be logged in) in package OVPsim for Windows32 and for Linux32
OVP Download page here.
OVP documentation that provides overview information on processor models is available OVP_Guide_To_Using_Processor_Models.pdf.
Full model specific documentation on the variant ARMv7-M is available OVP_Model_Specific_Information_armm_ARMv7-M.pdf.
Location: The Fast Processor Model source and object file is found in the installation VLNV tree: arm.ovpworld.org/processor/armm/1.0
Processor Endian-ness: This model can be set to either endian-ness (normally by a pin, or the ELF code).
Processor ELF Code: The ELF code for this model is: 0x28
The ARMv7-M SystemC TLM2 Fast Processor Model also has parameters, model commands, and many registers.
The model may also have hierarchy or be multicore and have other attributes and capabilities.
To see this information, please have a look at the model variant specific documents.
Click here to see the detailed document OVP_Model_Specific_Information_armm_ARMv7-M.pdf.
Information on the ARMv7-M OVP Fast Processor Model can also be found on other web sites:
www.systemc-cpu-models.org has the page www.systemc-cpu-models.org/arm_models/armv7-m
www.ovpworld.org has the library pages http://www.ovpworld.org/library/wikka.php?wakka=CategoryProcessor
www.systemc-processor-models.org has the page www.systemc-processor-models.org/arm_models/armv7-m
www.systemc-tlm-cpu-models.org has the page www.systemc-tlm-cpu-models.org/arm_models/armv7-m
www.systemc-tlm-models.org has the page www.systemc-tlm-models.org/arm_models/armv7-m
www.systemc-tlm-processor-models.org has the page www.systemc-tlm-processor-models.org/arm_models/armv7-m
Currently available Fast Processor Model Families.